82562EZ Datasheet, PDF (19/40 Pages) Intel Corporation – 82562EZ 10/100 Mbps Platform LAN Connect (PLC)

Networking Silicon — 82562EZ
4.2.2.2
10BASE-T Twisted Pair Ethernet (TPE) Receive Buffer and Filter
In 10 Mbps mode, data is expected to be received on the receive differential pair after passing through isolation
transformers. The filter is implemented inside the 82562EZ for supporting single magnetics that are shared with the
100BASE-TX side. The input differential voltage range for the Twisted Pair Ethernet (TPE) receiver is greater than
585 mV and less than 3.1 V. The TPE receive buffer distinguishes valid receive data, link test pulses, and the idle
condition, according to the requirements of the 10BASE-T standard.
The following line activity is determined to be inactive and is rejected as invalid data:
• Differential pulses of peak magnitude less than 300 mV.
• Continuous sinusoids with a differential amplitude less than 6.2 V_PP and frequency less than 2 MHz.
• Sine waves of a single cycle duration starting with 0° or 180° phase that have a differential amplitude less than
6.2 V_PP and a frequency of at least 2 MHz and not more than 16 MHz. These single-cycle sine waves are
discarded only if they are preceded by 4 bit times (400 ns) of silence.
All other activity is determined to be either data, link test pulses, Auto-Negotiation fast link pulses, or the idle
condition.
4.3
Analog References
The 82562EZ has two inputs, RBIAS100 and RBIAS10, that require external resistor connections to set biases for
its internal analog section. The input pins are sensitive to the resistor value and experimentation is required to
determine the correct values for any given layout. Resistors of 1% tolerance should be used.
Figure 4. Analog References
619 1%
649 1%
82562EZ
RBIAS10
RBIAS100
Datasheet
13