TLE7263E Datasheet, PDF (49/63 Pages) Infineon Technologies AG – Integrated HS-CAN, LIN, LDO and HS Switch System Basis Chip

TLE 7263E
Electrical Characteristics
Table 13 Electrical Characteristics (cont’d)
V_S = 13.5 V; I_CC1 = 1 mA; 4.9 V < V_CC1/2 < 5.1 V; SBC Active Mode; all outputs open;
-40 °C < T_j < 150 °C (max. 125 °C for CAN circuit characteristics); all voltages with
respect to ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
Symbol Limit Values Unit Test Condition
Min. Typ. Max.
CLK setup time
t_lag
Clock low after CSN t_beh
high
250 –
125 –
–
ns –
–
ns –
DI setup time
t_DISU
DI hold time
t_DIHO
Input signal rise time t_rIN
at pin DI, CLK and CSN
50 –
50 –
–
–
–
ns –
–
ns –
50 ns –
Input signal fall time
t_fIN
at pin DI, CLK and CSN
–
–
50 ns –
Delay time for mode t_fIN
change from Normal
Mode to Sleep Mode
–
–
10 µs –
CSN high time
t_CSN(high) 15
–
–
µs two oscillator periods
Data Output Timing Not subject to production test. Specified by design
DO rise time
t_rDO
–
30 80 ns C_L = 100 pF
DO fall time
t_fDO
–
30 80 ns C_L = 100 pF
DO enable time
t_ENDO
–
–
50 ns low impedance
DO disable time
t_DISDO
–
–
50 ns high impedance
Thermal Prewarning and Shutdown (junction temperatures)
(Not subject to production test. Specified by design)
V_CC1 thermal
prewarning
ON temperature
T_jPW
120 145 170 °C bit 0 of SPI diagnosis
word
V_CC1 thermal
prewarning hyst.
∆T
–
25 –
K–
V_CC1/2 thermal
shutdown temp.
T_jSD
155 185 200 °C hysteresis 35 K (typ.)
V_CC1 ratio of SD to PW T_jSD/
–
temp.
T_jPW
1.20 –
––
Data Sheet
49
Rev. 1.51, 2007-06-22