TLE7263E Datasheet, PDF (12/63 Pages) Infineon Technologies AG – Integrated HS-CAN, LIN, LDO and HS Switch System Basis Chip

TLE 7263E
Features
4.3
SBC Sleep Mode with Cyclic Sense
In order to reduce the current consumption to a minimum, but still supply a wake-up
circuit periodically, the SBC offers a Sleep Mode with Cyclic Sense (see Figure 5). This
mode is entered via SPI command, and turns-off the integrated bus transceivers and
respective termination, as well as the main voltage regulator. The High-Side switch is
turned-on according to the SPI timings setting for cyclic sense, as there is the cyclic
sense period and the on-time. Upon a voltage level change at the monitoring/wake-up
pins or by a CAN or LIN message the SBC Sleep Mode will be terminated and the SBC
Standby Mode will automatically be entered. The respective RxD pin of the transceiver
that generated the wake-up will be pulled low.
SBC Active Mode
MS2 MS1 MS0 Vcc1
0 0 / 1 0 / 1 ON
SBC Standby Mode
Vcc1
ON
Start Up
Power Up
µController SPI-Command:
- select „cyclic sense period“ via SPI Timing Bits
- select HS-Switch on-time via SPI „On-Time Bit“
- select SBC Sleep Mode via SPI Mode Bits
- window watchdog activation / deactivation via SPI
[can remain active as periodic reset timer]
Initialization of
MONx inputs ¹⁾
SBC Sleep Mode
MS2 MS1 MS0 Vcc1
1
0
0 OFF
HS-Switch = OFF
transition caused by:
- event at MON1 - 3 inputs
[only during HS-ON state]
- event at MON4 input
- CAN message
- LIN message
[SPI indicates source]
„sense period“ after „on-time“
HS cyclic sense
MS2 MS1 MS0 Vcc1
1
0
0 OFF
HS-Switch = ON
1) _{if initialization fails, device is}
switched into SBC Standby mode
cyclic_sense_sleep_TLE7263
Figure 5 State Diagram “SBC Sleep Mode with Cyclic Sense”
Data Sheet
12
Rev. 1.51, 2007-06-22