TLE7263E Datasheet, PDF (28/63 Pages) Infineon Technologies AG – Integrated HS-CAN, LIN, LDO and HS Switch System Basis Chip

TLE 7263E
Features
set in SBC Standby mode and the initialization error is shown indicated in the SPI status
word.
To have a defined level at a floating MONx pin a hold current is implemented. For high
level at MONx a pull up current I_PU,MON is driven out of the MONx pin, for low level at
MONx a pull down current I_PD,MON is drawn into the MONx pin.
4.16
High Side Switch
The high side output OUTHS is able to switch loads up to 150 mA. Its on-resistance is
2.5 Ω typ. @ 25 °C. In SBC Active, Standby, as well as in CAN and LIN Receive-Only
mode the high side output is switched on and off, respectively via an SPI input bit.
To supply external wake-up circuits in SBC Sleep Mode the output OUTHS can be
periodically switched on by the TLE 7263E itself. How Cyclic Sense works and how it is
activated is described in detail in “Operation Modes” on Page 9. Beside the cyclic
sense period can the on-time of the OUTHS be programmed to either 500 µs (default
setting) or 100 µs via SPI input bit. OUTHS undervoltage, temperature shutdown,
overcurrent as well as a temperature pre-warning is indicated by the SPI status word.
The OUTHS is protected against short circuit and overload. As soon as the undervoltage
condition of the supply voltage is met (V_S < V_UVOFF), the switch is automatically disabled
by the undervoltage lockout circuit. Moreover the switch is automatically disabled when
a reset or watchdog reset occurs.
4.17
Fail Safe Feature
The output FSO becomes HIGH when the watchdog is correctly serviced by the
microcontroller for the fourth time. As soon as either an undervoltage reset or watchdog
reset occurs, it is set LOW again. This feature is very useful to control critical applications
independent of the microcontroller e.g. to disable the power supply in case of a
microcontroller failure.
4.18
Send to Sleep Input STS
During Cyclic Wake the STS input is used to switch the SBC back to a low current mode
(High-Side switch “off”) when the microcontroller has completed its tasks during the
periodic wake-up phase, and before it enters its power saving mode (“Stop”) again.
4.19
Flash Program Mode
For flash programming it is useful to disable the window watchdog function. This can be
done by applying a voltage of V_INT > 7.0 V at pin INT. This is useful e.g. if the flash-
memory of the micro has to be programmed and therefore a regular watchdog triggering
is not possible.
Data Sheet
28
Rev. 1.51, 2007-06-22