TC1167 Datasheet, PDF (43/127 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1167
Introduction
– Static allocation commands offer compatibility with MultiCAN applications that are
not list-based.
• Advanced interrupt handling
– Up to 16 interrupt output lines are available. Interrupt requests can be routed
individually to one of the 16 interrupt output lines.
– Message post-processing notifications can be combined flexibly into a dedicated
register field of 256 notification bits.
2.4.5 Micro Link Interface
This TC1167 contains one Micro Link Interface, MLI0.
The Micro Link Interface (MLI) is a fast synchronous serial interface to exchange data
between microcontrollers or other devices, such as stand-alone peripheral components.
Figure 9 shows how two microcontrollers are typically connected together via their MLI
interfaces.
Controller 1
CPU
Controller 2
CPU
Peripheral
A
Peripheral
B
Peripheral
C
Peripheral
D
Memory
MLI
MLI
Memory
System Bus
System Bus
MCA06061
Figure 9 Typical Micro Link Interface Connection
Features
• Synchronous serial communication between an MLI transmitter and an MLI receiver
• Different system clock speeds supported in MLI transmitter and MLI receiver due to
full handshake protocol (4 lines between a transmitter and a receiver)
• Fully transparent read/write access supported (= remote programming)
• Complete address range of target device available
• Specific frame protocol to transfer commands, addresses and data
• Error detection by parity bit
Data Sheet
39
V1.3, 2009-10