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TC1167 Datasheet, PDF (108/127 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller
TC1167
Electrical Parameters
4. The PORST signal may be deactivated after all VDD5, VDD3.3, VDD1.5, and VAREF power-
supplies and the oscillator have reached stable operation, within the normal
operating conditions.
5. At normal power down the PORST signal should be activated within the normal
operating range, and then the power supplies may be switched off. Care must be
taken that all Flash write or delete sequences have been completed.
6. At power fail the PORST signal must be activated at latest when any 3.3 V or 1.5 V
power supply voltage falls 12% below the nominal level. The same limit of 3.3 V-12%
applies to the 5 V power supply too. If, under these conditions, the PORST is
activated during a Flash write, only the memory row that was the target of the write
at the moment of the power loss will contain unreliable content. In order to ensure
clean power-down behavior, the PORST signal should be activated as close as
possible to the normal operating voltage range.
7. In case of a power-loss at any power-supply, all power supplies must be powered-
down, conforming at the same time to the rules number 2 and 4.
8. Although not necessary, it is additionally recommended that all power supplies are
powered-up/down together in a controlled way, as tight to each other as possible.
9. Aditionally, regarding the ADC reference voltage VAREF:
– VAREF must power-up at the same time or later than VDDM, and
– VAREF must power-down eather earlier or at latest to satisfy the condition
VAREF < VDDM + 0.5 V. This is required in order to prevent discharge of VAREF filter
capacitance through the ESD diodes through the VDDM power supply. In case of
discharging the reference capacitance through the ESD diodes, the current must
be lower than 5 mA.
Data Sheet
103
V1.3, 2009-10