TC1167 Datasheet, PDF (17/127 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1167
Introduction
2.2
System Architecture of the TC1167
The TC1167 combines three powerful technologies within one silicon die, achieving new
levels of power, speed, and economy for embedded applications:
• Reduced Instruction Set Computing (RISC) processor architecture
• Digital Signal Processing (DSP) operations and addressing modes
• On-chip memories and peripherals
DSP operations and addressing modes provide the computational power necessary to
efficiently analyze complex real-world signals. The RISC load/store architecture
provides high computational bandwidth with low system cost. On-chip memory and
peripherals are designed to support even the most demanding high-bandwidth real-time
embedded control-systems tasks.
Additional high-level features of the TC1167 include:
• Program Memory Unit – instruction memory and instruction cache
• Serial communication interfaces – flexible synchronous and asynchronous modes
• Peripheral Control Processor – standalone data operations and interrupt servicing
• DMA Controller – DMA operations and interrupt servicing
• General-purpose timers
• High-performance on-chip buses
• On-chip debugging and emulation facilities
• Flexible interconnections to external components
• Flexible power-management
TC1167 clock frequencies:
• Maximum CPU clock frequency: 133 MHz¹⁾
• Maximum PCP clock frequency: 133 MHz²⁾
• Maximum SPB frequency: 80 MHz³⁾
The TC1167 is a high-performance microcontroller with TriCore CPU, program and data
memories, buses, bus arbitration, an interrupt controller, a peripheral control processor,
a DMA controller and several on-chip peripherals. The TC1167 is designed to meet the
needs of the most demanding embedded control systems applications where the
competing issues of price/performance, real-time responsiveness, computational power,
data bandwidth, and power consumption are key design elements.
The TC1167 offers several versatile on-chip peripheral units such as serial controllers,
timer units, and Analog-to-Digital converters. Within the TC1167, all these peripheral
units are connected to the TriCore CPU/system via the Flexible Peripheral Interconnect
(FPI) Bus and the Local Memory Bus (LMB). Several I/O lines on the TC1167 ports are
reserved for these peripheral units to communicate with the external world.
1) For CPU frequencies > 80 MHz, 2:1 mode has to be enabled. CPU 2:1 mode means: f_SPB = 0.5 * f_CPU
2) For PCP frequencies > 80 MHz, 2:1 mode has to be enabled. PCP 2:1 mode means: f_SPB = 0.5 * f_PCP
3) CPU 1:1 Mode means: f_{SPB =} f_CPU . PCP 1:1 mode means: f_SPB = f_PCP
Data Sheet
13
V1.3, 2009-10