HYE18P32161AC Datasheet, PDF (22/33 Pages) Infineon Technologies AG – 32M Asynchronous/Page CellularRAM

HYE18P32161AC(-/L)70/85
32M Asynch/Page CellularRAM
Functional Description
Table 6 Timing Parameters - Asynchronous Read
Parameter
Symbol
70
Min.
Max.
Read cycle time
t_RC
Address access time
t_AA
Page address cycle time
t_PC
Page address access time
t_PAA
Output hold from address change
t_OH
Chip select access time
t_CO
UB, LB access time
t_BA
OE to valid output data
t_OE
Chip select pulse width low time
t_CSL
Chip select to output active
t_LZ
Chip select disable to high-Z output t_HZ
UB, LB enable to output active
t_BLZ
UB, LB disable to high-Z output
t_BHZ
Output enable to output active
t_OLZ
Output disable to high-Z output
t_OHZ
CS1 high time when toggling
t_CPH
UB, LB high time when toggling
t_BPH
70
–
–
70
20
–
–
20
5
–
–
70
–
70
–
20
–
10
6
–
–
8
6
–
–
8
3
–
–
6
10
–
10
–
85
Min.
Max.
85
–
–
85
25
–
–
25
6
–
–
85
–
85
–
25
–
10
6
–
–
8
6
–
–
8
3
–
–
8
15
–
15
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
Notes
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Data Sheet
22
V2.0, 2003-12-16