HYE18P32161AC Datasheet, PDF (18/33 Pages) Infineon Technologies AG – 32M Asynchronous/Page CellularRAM

HYE18P32161AC(-/L)70/85
32M Asynch/Page CellularRAM
Functional Description
32Mb CellularRAM
24Mb
Deactivated
07FFFFh
000000h
8M
Activated
Figure 8 PASR Configuration Example
Active Memory
Array defined by
PASR to 8Mb
RCR.Bit 2,1,0= 010
2.3.2 Deep Power Down Mode
To put the device in deep power down mode, it is required to comply with 2-steps. At first, the DPD mode bit must
be set to be enabled in the Refresh Configuration Register. When DPD entry is really required, ZZ pin must be
asserted to low for longer than 10µs. Between these 2 steps, any normal operations are permitted. Once the
device enters into this extreme low power mode, current consumption is cut down to less than 25µA.
All internal voltage generators inside the CelllularRAM are switched off and the internal self-refresh is stopped.
This means that all stored information will be lost in any time. The device will remain in DPD mode as long as ZZ
is held low.To exit the Deep Power Down mode, it is needed to simply bring ZZ to high voltage level. A guard time
of at least 150µs has to be met where no commands beside DESELECT must be applied to re-enter standby or
idle mode. (see Figure 16).
2.3.3 Temperature Compensated Self Refresh (TCSR)
The 2-bit wide TCSR field features four different temperature ranges to adjust the refresh period to the actual case
temperature. DRAM technology requires higher refresh rates at higher temperature. At low temperature the
refresh rate can be reduced, which reduces as well the standby current of the chip. This feature can be used in
addition to PAR to lower power consumption in case of low or medium temperatures. Please refer to Table 5.
2.3.4 Power Saving Potential in Standby When Applying PASR, TCSR or DPD
Table 5 demonstrates the currents in standby mode when PASR, TCSR or DPD is applied.
Table 5 Standby Currents When Applying PASR, TCSR or DPD
Operation
Mode
Power Mode PASR Bit
Wake-Up Active
Controlled Phase Array
NO
STANDBY
TCSR RCR.Bit6-5 –
–
OPERATION/
DESELECT
PASR RCR.Bit2-0 –
Full
1/2
1/4
1/8
0
DPD
DEEP POWER DPD
DOWN
RCR.Bit4
~150 µs 0
Standby [µA]
85° 70° 45°
90(120) 75(100) 60(80)
80(105) 68(90) 56(75)
70(90) 62(80) 53(70)
60(75) 55(70) 52(65)
50(60) 50(60) 50(60)
15°
50(60)
50(60)
50(60)
50(60)
50(60)
25.0
Data Sheet
18
V2.0, 2003-12-16