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7133LA70GB Datasheet, PDF (9/16 Pages) Integrated Device Technology – HIGH SPEED 2K X 16 DUAL-PORT SRAM
◁
IDT7133SA/LA, IDT7143SA/LA
High-Speed 2K x 16 Dual-Port RAM
Military, Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage(5)
7133X20
7143X20
Com'l Only
7133X25
7143X25
Com'l, Ind
& Military
7133X35
7143X35
Com'l, Ind
& Military
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Unit
WRITE CYCLE
tWC
Write Cycle Time(3)
20
____
25
____
35
____
ns
tEW
Chip Enable to End-of-Write
15
____
20
____
25
____
ns
tAW
Address Valid to End-of-Write
15
____
20
____
25
____
ns
tAS
Address Set-up Time
0
____
0
____
0
____
ns
tWP
Write Pulse Width
15
____
20
____
25
____
ns
tWR
Write Recovery Time
0
____
0
____
0
____
ns
tDW
Data Valid to End-of-Write
15
____
15
____
20
____
ns
tHZ
Output High-Z Time(1,2)
____
12
____
15
____
20
ns
tDH
Data Hold Time(4)
tWZ
Write Enable to Output in High-Z(1,2)
tOW
Output Active from End-of-Write(1,2,4)
0
____
0
____
0
____
ns
____
12
____
15
____
20
ns
0
____
0
____
0
____
ns
2746 tbl 11a
7133X45
7143X45
Com'l &
Military
7133X55
7143X55
Com'l, Ind
& Military
7133X70/90
7143X70/90
Com'l &
Military
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Unit
WRITE CYCLE
tWC
Write Cycle Time(3)
45
____
55
____
70/90
____
ns
tEW
Chip Enable to End-of-Write
30
____
40
____
50/50
____
ns
tAW
Address Valid to End-of-Write
30
____
40
____
50/50
____
ns
tAS
Address Set-up Time
0
____
0
____
0/0
____
ns
tWP
Write Pulse Width
30
____
40
____
50/50
____
ns
tWR
Write Recovery Time
0
____
0
____
0/0
____
ns
tDW
Data Valid to End-of-Write
20
____
25
____
30/30
____
ns
tHZ
Output High-Z Time(1,2)
____
20
____
20
____
25/25 ns
tDH
Data Hold Time(4)
5
____
5
____
5/5
____
ns
tWZ
Write Enable to Output in High-Z(1,2)
____
20
____
20
____
25/25 ns
tOW
Output Active from End-of-Write(1,2,4)
5
____
5
____
5/5
____
ns
NOTES:
2746 tbl 11b
1. Transition is measured 0mV from Low or High-impedance voltage from the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization but not production tested.
3. For MASTER/SLAVE combination, tWC = tBAA + tWR + tWP, since R/W = VIL must occur after tBAA.
4. The specification for tDH must be met by the device supplying write data to the RAM under all operation conditions. Although tDH and tOW values will very over voltage and
temperature, the actual tDH will always be smaller than the actual tOW.
5. 'X' in part number indicates power rating (SA or LA).
6.942
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