7133LA70GB Datasheet, PDF (6/16 Pages) Integrated Device Technology – HIGH SPEED 2K X 16 DUAL-PORT SRAM

IDT7133SA/LA, IDT7143SA/LA
High-Speed 2K x 16 Dual-Port RAM
Military, Industrial and Commercial Temperature Ranges
Data Retention Characteristics
(LA Version Only) VLC = 0.2V, VHC = VCC - 0.2V
7133LA/7143LA
Symbol
Parameter
Test Condition
Min.
Typ.⁽¹⁾
Max. Unit
VDR
VCC for Data Retention
VCC = 2V
2.0
___
___
V
ICCDR
Data Retention Current
CE > VHC
MIL. & IND.
___
100
4000 ^{µ A}
VIN > VHC or < VLC
COM'L.
___
100
1500
tCDR⁽³⁾
Chip Deselect to Data Retention Time
0
___
___
V
tR⁽³⁾
Operation Recovery Time
NOTES:
1. Vcc = 2V, TA = +25°C, and are not production tested.
2. tRC = Read Cycle Time
3. This parameter is guaranteed by device characterization but is not production tested.
tRC⁽²⁾
___
___
V
2746 tbl 08
Data Retention Waveform
VCC
4.5V
tCDR
CE
VIH
DATA RETENTION MODE
VDR > 2V
VDR
4.5V
tR
VIH
2746 drw 05
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns Max.
1.5V
1.5V
Figures 1, 2 and 3
2746 tbl 09
DATAOUT
775Ω
5V
1250Ω
30pF
Figure 1. AC Output Test Load
DATAOUT
775Ω
5V
1250Ω
5pF*
Figure 2. Output Load
(for tLZ, tHZ, tWZ, tOW)
*Including scope and jig
6.642
5V
BUSY
270Ω
30pF
,
2746 drw 06
Figure 3. BUSY Output Load
(IDT7133 only)