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ICS8743008I Datasheet, PDF (8/28 Pages) Integrated Device Technology – FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR FOR PCI EXPRESS™ AND ETHERNET
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ICS8743008I
FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR
PRELIMINARY
Table 4C. LVCMOS/LVTTL DC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical
VIH
Input High Voltage
3.3V
2
VIL
Input Low Voltage
3.3V
-0.3
PDIV[0:1], QDIV[0:7],
FBO_DIV, MR, Q_TYPE
VDD = VIN = 3.465V
IIH
Input High Current
OE_MLVDS, OE[0:2],
FBI_DIV[0:1], PLL_SEL
VDD = VIN = 3.465V
PDIV[0:1], QDIV[0:7],
FBO_DIV, MR, Q_TYPE
VDD = 3.465V, VIN = 0V
-5
IIL
Input Low Current
OE_MLVDS, OE[0:2],
FBI_DIV[0:1], PLL_SEL
VDD = 3.465V, VIN = 0V
-150
Maximum
VDD + 0.3
0.8
150
5
Units
V
V
µA
µA
µA
µA
Table 4D. Differential DC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical
IIH
Input High Current
CLK/nCLK,
FBIN/nFBIN
VDD = VIN = 3.465V
IIL
VPP
VCMR
Input Low Current
CLK, FBIN
nCLK, nFBIN
Peak-to-Peak Voltage; NOTE 1
Common Mode Input Voltage; NOTE 1, 2
VDD = 3.465V, VIN = 0V
VDD = 3.465V, VIN = 0V
-5
-150
0.15
GND + 0.5
NOTE 1: VIL should not be less than -0.3V.
NOTE 2: Common mode input voltage is defined as VIH.
Maximum
150
1.3
VDD – 0.85
Units
µA
µA
µA
V
V
Table 4E. LVDS DC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
VOD
∆VOD
VOS
∆VOS
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
Typical
400
30
1.31
95
Maximum
Units
mV
mV
V
mV
Table 4F. M-LVDS DC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
VOD
∆VOD
VOS
∆VOS
ISC
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
Output Short Circuit Current
Typical
440
50
1.6
50
48
Maximum
Units
mV
mV
V
mV
mA
IDT™ / ICS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR 8
ICS8743008DKI REV. A AUGUST 25, 2008
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