ICS8743008I Datasheet, PDF (23/28 Pages) Integrated Device Technology – FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR FOR PCI EXPRESS™ AND ETHERNET

ICS8743008I
FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR
PRELIMINARY
Power Considerations – LVPECL Outputs
This section provides information on power dissipation and junction temperature for the ICS8743008I, for all outputs that are configured
to LVPECL. Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS8743008I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V_DD = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)_MAX = V_{DD_MAX} * I_{EE_MAX} = 3.465V * 230mA = 796.95mW
• Power (outputs)_MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 8 * 30mW = 240mW
Total Power__MAX (3.465V, with all outputs switching) = 796.95mW + 240mW = 1036.95mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj = θ_JA * Pd_total + T_A
Tj = Junction Temperature
θ_JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T_A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ_JA must be used. Assuming no air flow
and a multi-layer board, the appropriate value is 31.4°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 1.037W * 31.4°C/W = 117.6°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board.
Table 6. Thermal Resistance θ_JA for 40 Lead VFQFN, Forced Convection
θ_JA by Velocity
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
31.4°C/W
1
27.5°C/W
2.5
24.6°C/W
IDT™ / ICS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR 23
ICS8743008DKI REV. A AUGUST 25, 2008