ICS8743008I Datasheet, PDF (11/28 Pages) Integrated Device Technology – FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR FOR PCI EXPRESS™ AND ETHERNET

ICS8743008I
FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR
Typical LVDS Phase Noise at 125MHz
125MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.60ps (typical)
PRELIMINARY
Ethernet Filter
Raw Phase Noise Data
Phase Noise Result by adding
an Ethernet filter to raw data
Offset Frequency (Hz)
Typical LVDS Phase Noise at 100MHz
100MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.66ps (typical)
10Gb Ethernet Filter
Raw Phase Noise Data
Offset Frequency (Hz)
IDT™ / ICS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR 11
Phase Noise Result by adding a
10Gb Ethernet filter to raw data
ICS8743008DKI REV. A AUGUST 25, 2008