ICS8743008I Datasheet, PDF (12/28 Pages) Integrated Device Technology – FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR FOR PCI EXPRESS™ AND ETHERNET

ICS8743008I
FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR
Typical LVPECL Phase Noise at 125MHz
125MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.57ps (typical)
PRELIMINARY
Ethernet Filter
Raw Phase Noise Data
Offset Frequency (Hz)
Typical LVPECL Phase Noise at 100MHz
100MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.64ps (typical)
Phase Noise Result by adding
an Ethernet filter to raw data
10Gb Ethernet Filter
Raw Phase Noise Data
Phase Noise Result by adding a
10Gb Ethernet filter to raw data
Offset Frequency (Hz)
IDT™ / ICS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR 12
ICS8743008DKI REV. A AUGUST 25, 2008