ICS8743008I Datasheet, PDF (14/28 Pages) Integrated Device Technology – FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR FOR PCI EXPRESS™ AND ETHERNET

ICS8743008I
FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR
Parameter Measurement Information, continued
nQ0:Q7
nFBOUT
Q0:Q7, _20%
FBOUT
80%
t_R
80%
t_F
V_{SW I N G}
20%
nQ0:Q7,
nFBOUT
Q0:Q7
FBOUT
20%
80%
t_R
PRELIMINARY
80%
t_F
V_OD
20%
V_OS
GND
LVPECL Output Rise/Fall Time
LVDS Output Rise/Fall Time
nQ0:Q7,
nFBOUT
Q0:Q7,
FBOUT
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
LVPECL/LVDS Output Duty Cycle/Pulse Width/Period
Phase Noise Plot
Phase Noise Mask
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS Phase Jitter
V_DD
DC Input LVDS
out
➤
out
V_OS/∆ V_OS
V_DD
DC Input LVDS
out
➤
100
V_OD/∆ V_OD
out
Offset Voltage Setup
Differential Output Voltage Setup
IDT™ / ICS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR 14
ICS8743008DKI REV. A AUGUST 25, 2008