90E36 Datasheet, PDF (73/79 Pages) Integrated Device Technology – Poly-Phase High-Performance Wide-Span Energy Metering IC

90E36
POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
7.3.2 DMA TIMING (MASTER MODE)
The DMA timing is as shown in Figure-24 and Table-18.
SCLK
(CLK_IDLE=0)
SCLK
(CLK_IDLE=1)
SDI/SDO
tPD
CS
Figure-24 DMA Timing Diagram
Table-18 DMA Timing Specification
Symbol
t_PD
Description
Output Delay
Min.
Typical
Max.
Unit
50
ns
Electrical Specification
73
December 9, 2011