90E36 Datasheet, PDF (67/79 Pages) Integrated Device Technology – Poly-Phase High-Performance Wide-Span Energy Metering IC

90E36
POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Table-14 Harmonic Fourier Analysis Results Registers
Register
Address
180H
181H
182H
…
19EH
19FH
1A0H
1A1H
1A2H
…
1BEH
1BFH
1C0H
1C1H
1C2H
1C3H
1C4H
1C5H
1D0H
1D1H
Register Name
BV_HR2
BV_HR3
BV_HR4
BV_HR32
BV_THD
CV_HR2
CV_HR3
CV_HR4
CV_HR32
CV_THD
AI_FUND
AV_FUND
BI_FUND
BV_FUND
CI_FUND
CV_FUND
DFT_SCALE
DFT_CTRL
Read/Write
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
RW
RW
Functional Description
phase B, Voltage, Harmonic Ratio for 2-th
order component
phase B, Voltage, Harmonic Ratio for 3-th
order component
phase B, Voltage, Harmonic Ratio for 4-th
order component
Comment
Harmonic Ratio (%) = Register Value / 163.84
phase B, Voltage, Harmonic Ratio for 32-th
order component
phase B, Voltage, Total Harmonic Distortion
Ratio
phase C, Voltage, Harmonic Ratio for 2-th
order component
phase C, Voltage, Harmonic Ratio for 3-th
order component
phase C, Voltage, Harmonic Ratio for 4-th
order component
Harmonic Ratio (%) = Register Value / 163.84
phase C, Voltage, Harmonic Ratio for 32-th
order component
phase C, Voltage, Total Harmonic Distortion
Ratio
phase A, Current, Fundamental component
value
phase A, Voltage, Fundamental component
value
phase B, Current, Fundamental component
value
phase B, Voltage, Fundamental component
value
phase C, Current, Fundamental component
value
Current, Fundamental component value
= Register Value * 3.2656*10^-3 / 2^scale,
Register (1C0H, 1C2H, 1C4H);
Voltage, Fundamental component value
= Register Value * 3.2656*10^-2/ 2^scale,
Register (1C1H, 1C3H, 1C5H).
The scale is defined by the DFT_SCALE (1D0H)
register.
phase C, Voltage, Fundamental component
value
Input Gain = 2^Scale, i.e. Scale = # of bit shifts
[2:0]: Scale for Channel A-I.
[5:3]: Scale for Channel B-I.
[8:6]: Scale for Channel C-I.
[10:9]: Scale for Channel A-V.
[12:11]: Scale for Channel B-V.
[14:13]: Scale for Channel C-V.
[15]: Window disable. ‘1’ disable the Hanning
window.
Input data is scaled before sampling or DFT.
Bit[0]: DFT_START.
0: Reset and abort the DFT computation.
1: Start the DFT. This bit is automatically
cleared after DFT finishes.
Register
67
December 9, 2011