843N001I Datasheet, PDF (7/20 Pages) Integrated Device Technology – Low Voltage, LVCMOS/LVPECL-to-LVPECL/ECL Clock Generator

873991-147 DATA SHEET
TABLE 4C. DIFFERENTIAL DC CHARACTERISTICS, V = V = 3.3V ± 5%, V = 0V, TA = 0°C TO 50°C
CC
CCO
EE
Symbol Parameter
Test Conditions
Minimum Typical
I
IH
Input High Current
CLK/nCLK, EXT_FB/
nEXT_FB
V = V = 3.465V
CC
IN
CLK, EXT_FB
I
Input Low Current
IL
nCLK, nEXT_FB
V
Peak-to-Peak Input Voltage; NOTE 1
PP
V
Common Mode Input Voltage; NOTE 1, 2
CMR
NOTE 1: V should not be less than -0.3V.
IL
NOTE 2: Common mode voltage is defined as V .
IH
V = 3.465V, V = 0V
CC
IN
V = 3.465V, V = 0V
CC
IN
-5
-150
0.15
V + 0.5
EE
Maximum
150
1.3
V - 0.85
CC
Units
µA
µA
µA
V
V
TABLE 4D. LVPECL DC CHARACTERISTICS, V = V = 3.3V ± 5%, V = 0V, TA = 0°C TO 50°C
CC
CCO
EE
Symbol Parameter
Test Conditions
Minimum Typical
V
OH
V
OL
V
SWING
Output High Voltage; NOTE 2
Output Low Voltage; NOTE 2
Peak-to-Peak Output Voltage Swing
V - 1.4
CCO
V - 2.0
CCO
0.6
Maximum
V - 0.9
CCO
V - 1.7
CCO
1
Units
V
V
V
TABLE 5. PLL INPUT REFERENCE CHARACTERISTICS, V = V = 3.3V±5%, TA = 0°C TO 50°C
CC
CCO
Symbol Parameter
Test Conditions
Minimum
t /t
RR
Input Rise/Fall Time REF_CLK
Feedback ÷ 6
66.66
Reference Frequency
VCO_SEL = 0
Feedback ÷ 8
50
Feedback ÷ 16
25
Feedback ÷ 24
16.66
Feedback ÷ 4
50
f
REF
Feedback ÷ 6
33.33
Reference Frequency
VCO_SEL = 1
Feedback ÷ 8
25
Feedback ÷ 16
12.5
Feedback ÷ 24
8.33
Feedback ÷ 32
6.25
f
Reference Input Duty Cycle
25
REFDC
NOTE: These parameters are guaranteed by design, but are not tested in production.
Typical
Maximum
3
120
120
60
40
120
80
60
30
20
15
75
Units
ns
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
%
REVISION B 8/25/15
7
LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL
CLOCK GENERATOR