843N001I Datasheet, PDF (19/20 Pages) Integrated Device Technology – Low Voltage, LVCMOS/LVPECL-to-LVPECL/ECL Clock Generator

873991-147 DATA SHEET
Rev Table
A
T6
T4A
T4C
T4D
T6
T8
B
B
REVISION HISTORY SHEET
Page
8
6
7
7
8
11
13
14
16
Description of Change
AC Characteristics Table - corrected symbol for Half Cycle Jitter.
Power Considerations - corrected I from 150mA to 165mA and recalulated
EE_MAX
equations.
Deleted the word Preliminary from inside page headers.
Changed from 0°C to 70°C to 0°C to 50°C throughout the datasheet.
Changed PCLK/nPCLK to CLK/nCLK throughout the datasheet.
Power Supply DC Characteristics Table - changed V from 3.135V min to V -
CCA
CC
0.15V and 3.465V max. to V
CC.
Added Differential DC Characteristics Table for CLK/nCLK and EXT_FB/nEXT_
FB inputs.
Updated LVPECL DC Characteristics Table for LVPECL outputs.
AC Characteristics Table - corrected Half-Cycle Jitter symbol from tjit(hper) to
tjit(hcyc).
Updated Differential Clock Input Interface section.
Added Schematic Layout.
Power Considerations - corrected I from 165mA to 260mA, updated Ther-
EE _MAX
mal Resistance values in Table 7, and recalculated equations.
Air Flow Table - updated the values.
Product Discontinuation Notice - Last time buy expires August 14, 2016.
PDN CQ-15-04
Date
11/18/08
3/31/09
8/25/15
REVISION B 8/25/15
19
LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL
CLOCK GENERATOR