8413S12 Datasheet, PDF (29/33 Pages) Integrated Device Technology – Selectable external crystal or differential

Reliability Information
Table 10. _JA vs. Air Flow Table for a 72 Lead VFQFN
_JA vs. Air Flow
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
25.4°C/W
Transistor Count
The transistor count for 8413S12 is: 10,297
1
20.5°C/W
8413S12 DATA SHEET
2.5
18.4°C/W
Package Outline and Package Dimensions
Table 11. Package Dimensions - 72 Lead VFQFN
All Dimensions in Millimeters
Symbol
Minimum
Nominal
Maximum
N
72
A
0.80
0.90
1.00
A1
0
0.02
0.05
A2
0.58
0.65
1.00
A3
0.20 Ref.
b
0.18
0.25
0.30
N_D & N_E
D&E
18
10.00 Basic
D1 & E1
9.75 Basic
D2 & E2
5.50
6.00
6.60
e
0.50 Basic

8°
10°
12°
L
0.30
0.40
0.50
R (ref)
b min/2
R1
0.20
T
0.45 Ref.
aaa
0.15
bbb
0.10
ccc
0.10
ddd
0.05

0
14
Reference Document: PSC-4111
Bottom View w/Type A ID
2
1
CHAMFER
4
N N-1
Bottom View w/Type C ID
2
1
RADIUS
4
N N-1
There are 2 methods of indicating pin 1 corner
at the back of the VFQFN package:
1. Type A: Chamfer on the paddle (near pin 1)
2. Type C: Mouse bite on the paddle (near pin 1)
REVISION D 1/27/15
29
HCSL/ LVCMOS CLOCK GENERATOR