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8413S12 Datasheet, PDF (28/33 Pages) Integrated Device Technology – Selectable external crystal or differential
8413S12 DATA SHEET
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 9.
VDD
IOUT = 17mA
RREF =
475 ± 1%
VOUT
RL
50
IC
Figure 9. HCSL Driver Circuit and Termination
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate on-chip output power dissipation due
to the loading, use the following equations which assume a 50 load to ground.
The highest power dissipation occurs when VDD_MAX.
Power = (VDD_MAX – VOUT) * IOUT
since VOUT = IOUT * RL
Power = (VDD_MAX – IOUT * RL) * IOUT
= (3.465V – 17mA * 50) * 17mA
Total Power Dissipation per output pair = 44.5mW
HCSL/ LVCMOS CLOCK GENERATOR
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REVISION D 1/27/15