ICS1894-32_1 Datasheet, PDF (27/53 Pages) Integrated Device Technology – 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
Bit
Definition
When Bit = 0
When Bit = 1
Access ² SF² Default³ Hex
23.3
Link Partner
Link Partner
Acknowledge Interrupt Acknowledge did not
occur
Link Partner Acknowledge RO/SC
occurred
0
0
23.2
Link Down Interrupt Link Down did not occur Link Down occurred
RO/SC
0
23.1
Remote Fault Interrupt Remote Fault did not
Remote Fault occurred
RO/SC
0
occur
23.0
Link Up Interrupt
Link Up did not occur
Link Up occurred
RO/SC
0
Register 24h - Extended Control Register
24.15:12
FIFO Half
RMII FIFO half full bits ((n+3)*2 bit), RMII
RW
2
2
24.11:9
Reserved
Reserved
RW
0
0
24.8
Deep Power down Deep power down(DPD) Deep power down(DPD)
RW
0
enable
disable
enable
24.7 Tpll10_100 DPD Enable Don't power down
10/100 PLL in DPD
mode
Controlled auto power
RW
down10/100 PLL in DPD
mode
0
0
24.6
RX 100 DPD Enable Don't power down RX Controlled auto power
RW
0
block in DPD mode
down of RX block in DPD
mode
24.5 Admix_TX DPD Enable Don't power down
Control auto power down
RW
0
admix_dac block in DPD of admix_dac block in
mode
DPD mode
24.4 Cdr100_cdr DPD Enable don't power down in DPD Control auto power down
RW
0
mod
of CDR block in DPD
mode
24.3:0
Reserved
Reserved
0
0
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
27
ICS1894-32 REV G 020509