ICS1894-32_1 Datasheet, PDF (14/53 Pages) Integrated Device Technology – 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
If a crystal is used as the clocking source, connect it to both
the REFIN (pin 30) and REFOUT (pin 29) pins of the
ICS1894-32. A pair of bypass capacitors on either side of
the crystal are connected to ground. The crystal is used in
the parallel resonance or anti-resonance mode. The value
of the load caps serve to adjust the final frequency of the
crystal oscillation. Typical applications would use 25 pF load
caps. The exact value will be affected by the board routing
capacitance on REFIN and REFOUT pins. Smaller load
capacitors raise the frequency of oscillation.
Once the exact value of load capacitance is established it
will be the same for all boards using the same specification
crystal. The best way to measure the crystal frequency is to
measure the frequency of TXCLK (pin 22) using a frequency
counter with a 1 second gate time. Using the buffered output
TXCLK prevents the crystal frequency from being affected
by the measurement. The crystal specification is shown in
the 25MHz Crystal Specification table.
25 MHz Crystal Specification Table
Specifications
Fundamental Frequency
Freq. Tolerance
Input Capacitance
Symbol Minimum Typical Maximum
F0
24.99875 25.00000 25.00125
∆F/f
± 50
Cin
3
Unit
MHz
ppm
pF
25 MHz Oscillator Specification table
Specifications
Output Frequency
Freq. Stability (including aging)
Duty cycle CMOS level one-half VDD
VIH
VIL
Period Jitter
Input Capacitance
Symbol Minimum Typical Maximum
F0
24.99875 25.00000 25.00125
∆F/f
± 50
Tw/T
35
65
2.79
0.33
Tjitter
500
CIN
3
Unit
MHz
ppm
%
Volts
Volts
pS
pF
50 MHz Oscillator Specification table
Specifications
Output Frequency
Freq. Stability (including aging)
Duty cycle CMOS level one-half VDD
VIH
VIL
Period Jitter
Symbol Minimum Typical Maximum
F0
49.9975 50.00000 50.0025
∆F/f
± 50
Tw/T
35
65
2.79
0.33
Tjitter
500
Input Capacitance
CIN
3
Unit
MHz
ppm
%
Volts
Volts
pS
pF
Status Interface
The ICS1894-32 has two multi-function configuration pins
that report the PHY status by providing signals that are
intended for driving LEDs. Configuration is set by Bank0
Register 20.
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
14
ICS1894-32 REV G 020509