ICS1894-32_1 Datasheet, PDF (18/53 Pages) Integrated Device Technology – 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
Bit
Definition
When Bit = 0
When Bit = 1
2.3 OUI bit 15 | o
N/A
N/A
2.2 OUI bit 16 | p
N/A
N/A
2.1 OUI bit 17 | q
N/A
N/A
2.0 OUI bit 18 | r
N/A
N/A
Register 3h - PHY Identifier
3.15 OUI bit 19 | s
N/A
N/A
3.14 OUI bit 20 | t
N/A
N/A
3.13 OUI bit 21 | u
N/A
N/A
3.12 OUI bit 22 | v
N/A
N/A
3.11 OUI bit 23 | w
N/A
N/A
3.10 OUI bit 24 | x
N/A
N/A
3.9 Manufacturer’s Model
N/A
N/A
Number bit 5
3.8 Manufacturer’s Model
N/A
N/A
Number bit 4
3.7 Manufacturer’s Model
N/A
N/A
Number bit 3
3.6 Manufacturer’s Model
N/A
N/A
Number bit 2
3.5 Manufacturer’s Model
N/A
N/A
Number bit 1
3.4 Manufacturer’s Model
N/A
N/A
Number bit 0
3.3 Revision Number bit 3
N/A
N/A
3.2 Revision Number bit 2
N/A
N/A
3.1 Revision Number bit 1
N/A
N/A
3.0 Revision Number bit 0
N/A
N/A
Register 4h - Auto-Negotiation Advertisement
4.15 Next Page
Next page not supported Next page supported
4.14 IEEE reserved
Always 0
N/A
4.13 Remote fault
Locally, no faults
detected
Local fault detected
4.12 IEEE reserved
Always 0
N/A
4.11 IEEE reserved
Always 0
N/A
4.10 IEEE reserved
Always 0
N/A
4.9 100Base-T4
Always 0. (Not
N/A
supported.)
4.8 100Base-TX, full duplex Do not advertise ability Advertise ability
Access ² SF² Default³ Hex
CW
–
0
5
CW
–
1
CW
–
0
CW
–
1
CW
–
1
F
CW
–
1
CW
–
1
CW
–
1
CW
–
0
4
CW
–
1
CW
–
0
CW
–
0
CW
–
0
5
CW
–
1
CW
–
0
CW
–
1
CW
–
0
0
CW
–
0
CW
–
0
CW
–
0
R/W
–
0
0
CW
–
0†
R/W
–
0
CW
–
0†
CW
–
0†
1
CW
–
0†
CW
–
0
R/W
–
1
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
18
ICS1894-32 REV G 020509