ICS9LPRS511EGLF Datasheet, PDF (18/19 Pages) Integrated Device Technology – Low Power Programmable Timing Control Hub™ for P4™ processor

Integrated
Circuit
Systems, Inc.
ICS9LPRS511
Advance Information
N
INDEX
AREA
12
D
c
L
E1 E


A2
A
A1
-C-
e
b
SEATING
PLANE
aaa C
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
N
α
aaa
6.10 mm. Body, 0.50 mm. Pitch TSSOP
(240 mil)
(20 mil)
In Millimeters
In Inches
COMMON DIMENSIONS COMMON DIMENSIONS
MIN
MAX
MIN
MAX
--
1.20
--
.047
0.05
0.15
.002
.006
0.80
1.05
.032
.041
0.17
0.27
.007
.011
0.09
0.20
.0035
.008
SEE VARIATIONS
SEE VARIATIONS
8.10 BASIC
0.319 BASIC
6.00
6.20
.236
.244
0.50 BASIC
0.020 BASIC
0.45
0.75
.018
.030
SEE VARIATIONS
SEE VARIATIONS
0°
8°
0°
8°
--
0.10
--
.004
VARIATIONS
N
64
D mm.
MIN
MAX
16.90
17.10
D (inch)
MIN
MAX
.665
.673
Reference Doc.: JEDEC Publication 95, MO-153
10-0039
Ordering Information
ICS9LPRS511yGLF-T
Example:
ICS XXXX y G LF- T
Designation for tape and reel packaging
RoHS Compliant (Optional)
Package Type
G = TSSOP
Revision Designator (will not correlate with datasheet revision)
Device Type
1137—09/05/08
Prefix
ICS = Standard Device
18