ICS5342 Datasheet, PDF (32/36 Pages) Integrated Circuit Systems – 16-Bit Integrated Clock-LUT-DAC

ICS5342
GENDAC
Recommended Layout
LOCATE NEAR
CONTROLLER
R4
R4
C2 R2
LOCATE NEAR
CONTROLLER
R1
C2
R2
10
CLK1
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
DGND
26
FB1 C3
C1
VAA
C1
5342_30
GENDAC II
ICS5342
CGND 60
PCLK 59
58
57
56
55
54
53
52
51
XVDD 50
XOUT 49
XIN 48
XGND 47
VREF 46
45
44
R5
C2
VAA
Y1
DGND
C2
C2
C2
VAA
R3
VIA to power plane
VIA to ground plane
C1 0.047 µF chip capacitor
C2 0.1 µF chip capacitor
C3 10 µF tantalum capacitor
FB1 ferrite bead, Fair-Rite 2743019447
R1 33 ohm
R2 100 ohm
R3 141 ohm, 1%
R4 220 ohm
R5 560 ohm
Y1 parallel resonant crystal cut for C_L = 12 pF
Board Layout and Analog Signal Consider-
ations
The high performance of the GENDAC is dependent on care-
ful PC board layout. The use of a four layer board (internal
power and ground planes, signals on the two surface layers) is
recommended. The ground plane layer should be closest to the
component side of the board. The layout following this sec-
tion shows a suggested configuration.
Power Supply
As a high speed CMOS device, the GENDAC may draw large
transient currents from the power supply. It is necessary to
adopt high-frequency board-layout and power-distribution
techniques to assure proper operation of the GENDAC. This
will also minimize radio frequency interference (RFI). DAC
to DAC crosstalk can also be attributed to a high impedance
power supply.
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