ICS5342 Datasheet, PDF (14/36 Pages) Integrated Circuit Systems – 16-Bit Integrated Clock-LUT-DAC

ICS5342
GENDAC
Functional Description
This section describes the register address and bit definition
for the RAMDAC and the Frequency Synthesizer sections.
Color Palette
Command Register
(RS0-RS2 = 011)
(RS0-RS1 = 01 with hidden flag)
By setting bits 4 and 7-5 in the command register the
ICS5342 can be programmed for different color modes and
the DACs can be turned off for low power operation.
Command Registers
7654 3
2
2 1 0 3 Reserved = 0
1
0
Test mode Snooze
Bit 7-4
Bit 3-2
Bit 1
Bit 0
Color Mode Select - These three bits select the
Color Mode of RAMDAC operation as shown in
the following table “Color Mode Select” (default
is 0 at power up).
(Reserved) Set to ‘0’ for future compatibility.
Test Mode - When bit 1 is set checksum accumu-
lation is enabled. If bit 0 is also set the oscillator
and synthesizers are turned off for minimum
noise.
Power Down Mode of RAMDAC - When this bit
is set to 0 (default is 0), the device operates nor-
mally. If this bit is set to 1, the power and clock
to the Color Palette RAM and DACs are turned
off. The data in the Color Palette RAM are still
preserved. The CPU can access without loss of
data by internal automatic clock start/stop con-
trol. The DAC outputs become the same as
BLANK* (sync) level output during power down
mode. This bit does not affect the PLL clock syn-
thesizer function unless test mode is enabled.
Color Mode Select
8-BIT INTERFACE
Mode
CM3
Number (CR4)
0
0
1
0
3
0
2
0
1
0
1
0
2
0
3
0
16-BIT INTERFACE
CM2
(CR7)
0
0
0
0
1
1
1
1
CM1
(CR6)
0
0
1
1
0
0
1
1
CM0
(CR5)
0
1
0
1
0
1
0
1
Color Mode
8-bit Pseudo Color With Palette (default)
15-bit Direct Color With Bypass (Hi-Color)
24-Bit True Color With Bypass (True Color)
16-bit Direct Color With Bypass (XGA)
15-bit Direct Color With Bypass (hi-color)
15-bit Direct Color With Bypass (Hi-Color)
15-bit Direct Color With Bypass (Hi-Color)
24-bit True Color With Bypass (True Color)
Clock Cycles/
Pixel Bits
1
2
3
2
2
2
2
3
Mode
Number
4
5
6
7
8
CM3
(CR4)
1
1
1
1
1
1
1
1
CM2
(CR7)
0
0
0
0
1
1
1
1
CM1
(CR6)
0
0
1
1
0
0
1
1
CM0
(CR5)
0
1
0
1
0
1
0
1
Color Mode
Multiplexed 16-bit Pseudo Color With Palette
15-bit Direct Color With Bypass (Hi-Color)
16-bit Direct Color With Bypass (XGA
24-bit True Color With Bypass (True Color)
24-bit Packed True Color With Bypass
(true-color)
Reserved
Reserved
Reserved
Clock Cycles/
Pixel Bits
1/2
1
1
2
3/2
14