IC-MV Datasheet, PDF (25/28 Pages) IC-Haus GmbH – 8-BIT HALL ENCODER

iC-MV 8-BIT HALL ENCODER WITH
CASCADABLE SERIAL INTERFACE
preliminary
iC-LGC with 3 iC-MVs
LED
VCCA LVCC VDDM VDD
iC-LGC
LED
LED
CTRL.
SIN
COS
ADJUST
TRACK 13
TRACK 12
TRACK 2
TRACK 1
BiSS
MA
SLO
SLI
MDI
MTI
MCL
Rev B1, Page 25/28
VDD
GND
Supply
MA-
MA+
SL-
SL+
BiSS
Interface
EEPROM
SDA
SCL
SDA
I2C
SCL
SIN/COS
INTERPOLATOR
NERR
AGND GND
VDD
ERROR
NERR NERR Output
VDDS
NERR
SLO
8 BIT
VDD
B
PCOS
B
PSIN
CONVERSION
LOGIC
B
NSIN
B
NCOS
SIN/DIG
HALL SENSOR
iC-MV 3
SERIAL INTERFACE
QD QD QD QD QD
SLI
SCLK
EEPROM INTERFACE
GND SCL SDA ADR0 ADR1
VDD
VDD
EEPROM
SDA
SCL
VDDS
NERR
SLO
8 BIT
VDD
B
PCOS
B
PSIN
CONVERSION
LOGIC
B
NSIN
B
NCOS
SIN/DIG
HALL SENSOR
iC-MV 2
SERIAL INTERFACE
QD QD QD QD QD
SLI
SCLK
GND
EEPROM INTERFACE
SCL SDA ADR0 ADR1
VDD
VDDS
NERR
SLO
8 BIT
VDD
B
PCOS
B
PSIN
CONVERSION
LOGIC
B
NSIN
B
NCOS
SIN/DIG
HALL SENSOR
iC-MV 1
SERIAL INTERFACE
QD QD QD QD QD
SLI
SCLK
EEPROM INTERFACE
GND SCL SDA ADR0 ADR1
Figure 21: iC-LGC with 3 iC-MVs
SDA
SCL
Configuration
Interface