IC-MV Datasheet, PDF (23/28 Pages) IC-Haus GmbH – 8-BIT HALL ENCODER

iC-MV 8-BIT HALL ENCODER WITH
CASCADABLE SERIAL INTERFACE
preliminary
Rev B1, Page 23/28
iC-MN with 3 iC-MVs
RLED
iC-TL85
VDDS
iC-PNxxxx ^{VCC VREF}
DPS_N
DPS_N
PS_N
NS_N
DPS_N
DPS_N
PC_N
NC_N
DPS_N
DPS_N
PS_M
NS_M
DPS_N
DPS_N
PC_M
NC_M
DPS_N
DPS_N
PS_S
NS_S
DPS_N
DPS_N
PC_S
NC_S
GND
S
SDA
SCL
EEPROM
VDDS
VDDS
VDDS
VACO
ACOM
ACON
ACOS
VDDS
PSINN
NSINN
PCINN
NCINN
PSINM
NSINM
PCINM
NCINM
PSINS
NSINS
PCINS
NCINS
Analog In
Nonius
Analog In
Master
Analog In
Segment
Reverse
Polarity
Protection
iC-MN
Nonius
SDA
SCL
I2C
GNDS
S
VDDS
VDD
-
+
-
+
Analog Out
Serial
Interface
PCOUT
NCOUT
PSOUT
NSOUT
SLO
NSLO
MA
NMA
SLI
MAO
CONFIG
DIR
PRES
MTSLI
MTI
MTMA
NERR
GND T2 T3 T1 T0
S _VDDS
VDDS
VDD
GND
Supply
VDDS
PCOUT
NCOUT
PSOUT
NSOUT
Analogout+
Calibrationsignals
SLO
NSLO
MA
NMA
BiSS
Interface
ERROR
S
T0
Calibration
T1
Signals
NERR
SLO
8 BIT
VDD
B
PCOS
B
PSIN
CONVERSION
LOGIC
B
NSIN
B
NCOS
SIN/DIG
HALL SENSOR
iC-MV 3
SERIAL INTERFACE
QD QD QD QD QD
SLI
SCLK
EEPROM INTERFACE
GND SCL SDA ADR0 ADR1
S
S _VDDS
NERR
SLO
8 BIT
VDD
B
PCOS
B
PSIN
CONVERSION
LOGIC
B
NSIN
B
NCOS
SIN/DIG
HALL SENSOR
iC-MV 2
SERIAL INTERFACE
QD QD QD QD QD
SLI
SCLK
GND
EEPROM INTERFACE
SCL SDA ADR0 ADR1
S
VDDS ^S
NERR
SLO
8 BIT
VDD
B
PCOS
B
PSIN
CONVERSION
LOGIC
B
NSIN
B
NCOS
SIN/DIG
HALL SENSOR
iC-MV 1
SERIAL INTERFACE
QD QD QD QD QD
SLI
SCLK S
EEPROM INTERFACE
GND SCL SDA ADR0 ADR1
S
S
S
MTMA
MTSLO
SDA
SCL
Configuration
Interface
EEPROM
SDA
SCL
VDDS
Figure 19: iC-MN with 3 iC-MVs