IC-MV Datasheet, PDF (15/28 Pages) IC-Haus GmbH – 8-BIT HALL ENCODER

iC-MV 8-BIT HALL ENCODER WITH
CASCADABLE SERIAL INTERFACE
preliminary
Rev B1, Page 15/28
EMODE(2:0)
Addr. 0x1; bit 5:3
Code
Description
0x00
No error bit
0x01
1 serial error bit lo active
0x03
1 serial error bit hi active
0x05
n serial error bit lo active
0x07
n serial error bit hi active
a loss-of-magnet condition will be indicated at output
NERR.
NOSBY
Code
0x00
0x01
Addr. 0x02; bit 6
Pin function NERR
Standby input (lo active)
Error output (lo active)
Condition
ENPU = 0x0
ENPU = 0x1
Table 9: Error Bit Options
Note:
If EMODE is configured with 0x01 the SLI pin of
iC-MV1 has to be left open or connected to VDD. If
EMODE is configured with 0x03 the SLI pin of iC-MV1
has to be connected to GND.
DL(2:0): Data Length
The data length indicates how many positions of the
position register are clocked out. The data length of
the first iC-MV in the chain can be set to a bigger value
because of the singleturn synchronisation.
DL(2:0)
Code
0x00
...
0x02
0x03
0x04
...
0x07
Addr. 0x1; bit 2:0
Description
DL + 1 = 1 bit
...
DL + 1 = 3 bit
DL + 1 = 4 bit
DL + 1 = 5 bit
...
DL + 1 = 8 bit
Table 10: Data Length
Table 12: Standby Enable
LOPM: Low Power Mode
The low power mode minimizes the sampling rate and
thereby reduces the current consumption of iC-MV to
approx. 2 mA. For a faster start-up the low power mode
is deactivated until the gain control is engaged. While
settling, the supply power is specified according to Item
No. 002.
LOPM
Code
0x0
0x1
Addr. 0x2; bit 5
Description
Low power mode deactivated
Low power mode activated
Table 13: Low Power Mode
ENPU: Pull-up Enable
Pin NERR has an pull up Resistor of approx. 200 kΩ.
Bit ENPU activates an additional pull-up resistor of ap-
prox. 11 kΩ at pin NERR.
VDD
ERRSY: Synchronization Monitoring
If the data length is programmed to 4 bit (DL = 0x03) the
synchronization monitoring can activated via bit ERRSY.
In this case the error/warning bit will be set if the edge
of the permissible synchronizing range is reached or
exceeded because the position data is possibly not
consistent.
ERRSY
Code
0x0
0x1
Addr. 0x2; bit 7
Description
Synchronization monitoring deactivated
Synchronization monitoring activated
Table 11: Synchronization Monitoring
ENPU
Code
0x00
0x01
R
PullUp
ENPU
NERR
Figure 13: Pull-up Resistor
Addr. 0x02; bit 4
Pin function ENPU
Pull-up deactivated
Pull-up activated
Condition
NOSBY = 0x0
NOSBY = 0x1
NOSBY: Standby Enable
If the NOSBY bit is not set, iC-MV can be switched to
standby operation by switching NERR to lo. The posi-
tion data is thereby maintained. In order to save energy,
the additional pull up resistor should be switched off
via Bit ENPU. In case of a faulty configuration, iC-MV
remains in standby enable. If the NOSBY bit is set,
Table 14: Pull-up Enable
SYNC: Position Data Synchronization
The SYNC bit activates the synchronization of the posi-
tion data. If the SYNC bit is deactivated, the position
data is output unaltered.