HY5S7B6LF-H Datasheet, PDF (9/51 Pages) Hynix Semiconductor – 512MBit MOBILE SDR SDRAMs based on 8M x 4Bank x16I/O

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512Mbit (32Mx16bit) Mobile SDR Memory
HY5S7B6LF(P) Series
DC CHARACTERISTICS II (TA= -25 to 85^oC)
Parameter
Symbol
Test Condition
Speed
H
S
Unit Note
Operating Current
IDD1
Burst length=1, One bank active
tRC ≥ tRC(min), IOL=0mA
90
mA 1
Precharge Standby Current
in Power Down Mode
IDD2P
IDD2PS
CKE ≤ VIL(max), tCK = 15ns
CKE ≤ VIL(max), tCK = ∞
0.3
mA
0.3
mA
CKE ≥ VIH(min), CS ≥ VIH(min), tCK =
15ns
IDD2N Input signals are changed one time during
10
Precharge Standby Current
in Non Power Down Mode
2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
mA
IDD2NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
1.0
Active Standby Current
in Power Down Mode
IDD3P CKE ≤ VIL(max), tCK = 15ns
IDD3PS CKE ≤ VIL(max), tCK = ∞
5.0
mA
3.0
CKE ≥ VIH(min), CS ≥ VIH(min), tCK =
15ns
IDD3N Input signals are changed one time during
20
Active Standby Current
in Non Power Down Mode
2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
mA
IDD3NS
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
10
Burst Mode Operating
Current
IDD4
tCK ≥ tCK(min), IOL=0mA
All banks active
100
85 mA 1
Auto Refresh Current
IDD5 tRFC ≥ tRFC(min),
150
mA
Self Refresh Current
IDD6 CKE ≤ 0.2V
See Next Page mA 2
Standby Current in
Deep Power Down Mode
IDD7
See p.43~44 & 50 ~ 51
10
uA
Note :
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2. See the tables of next page for more specific IDD6 current values.
Rev 1.0 / Jan. 2007
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