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HY29DS162 Datasheet, PDF (36/48 Pages) Hynix Semiconductor – 16 Megabit (2M x 8/1M x 16) Super-Low Voltage, Dual Bank, Simultaneous Read/Write, Flash Memory
HY29DS162/HY29DS163
AC CHARACTERISTICS
Program and Erase Operations
Parameter
JEDEC Std
tAVAV
tAVWL
tWLAX
tDVWH
tWHDX
tGHWL
tELWL
tWHEH
tWLWH
tWHWL
tWC
tAS
tAH
tAST
tAHT
tDS
tDH
tGHWL
tCS
tCH
tOEPH
tCEPH
tWP
tWPH
tSR/W
Description
Write Cycle Time 1
Address Setup Time
Address Hold Time
Address Setup Time for Toggle Bit Test
Address Hold Time for Toggle Bit Test
Data Setup Time
Data Hold Time
Read Recovery Time Before Write
CE# Setup Time
CE# Hold Time
Output Enable High Time for Toggle Bit Test
Chip Enable High Time for Toggle Bit Test
Write Pulse Width
Write Pulse Width High
Latency Between Read and Write Operations
tWHWH1
Programming Operation 1, 2, 3
tWHWH1
Byte Mode
Word Mode
Accelerated Programming
Operation 1, 2, 3 (WP#/ACC = VHH)
Byte or
Word Mode
Chip Programming Operation 1, 2, 3, 5
Byte Mode
Word Mode
tWHWH2
tWHWH3
tWHWH2 Sector Erase Operation 1, 2, 4
tWHWH3 Chip Erase Operation 1, 2, 4
Erase and Program Cycle Endurance 1
tVCS
tRB
tBUSY
VCC Setup Time 1
Recovery Time from RY/BY#
WE# High to RY/BY# Delay
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Typ
Max
Typ
Max
Typ
Max
Typ
Max
Typ
Max
Typ
Max
Typ
Typ
Min
Min
Min
Min
Speed Option
- 12
- 13
120
130
0
60
60
15
0
60
60
0
0
0
0
20
20
50
50
30
0
13
300
17
360
13
240
26
160
17
96
1
10
35
1,000,000
100,000
50
0
100
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
µs
sec
sec
sec
sec
sec
sec
sec
cycles
cycles
µs
ns
ns
Notes:
1. Not 100% tested.
2. Typical program and erase times assume the following conditions: 25 °C, VCC = 2.0 volts, 100,000 cycles. In addition,
programming typicals assume a checkerboard pattern. Maximum program and erase times are under worst case condi-
tions of 90 °C, VCC = 1.8 volts, 100,000 cycles.
3. Excludes system-level overhead, which is the time required to execute the four-bus-cycle sequence for the Program
command. See Table 10 for further information on command sequences.
4. Excludes 0x00 programming prior to erasure. In the preprogramming step of the Automatic Erase algorithm, all bytes
are programmed to 0x00 before erasure.
5. The typical chip programming time is considerably less than the maximum chip programming time listed since most
bytes/words program faster than the maximum programming times specified. The device sets DQ[5] = 1 only If the
maximum byte/word program time specified is exceeded. See Write Operation Status section for additional information.
36
r1.3/Apr 01