HY29DS162 Datasheet, PDF (25/48 Pages) Hynix Semiconductor – 16 Megabit (2M x 8/1M x 16) Super-Low Voltage, Dual Bank, Simultaneous Read/Write, Flash Memory

WRITE OPERATION STATUS
The HY29DS16x provides a number of facilities
to determine the status of a program or erase op-
eration. These are the RY/BY# (Ready/Busy#)
pin and certain bits of a status word which can be
read from the device during the programming and
erase operations. Table 16 summarizes the sta-
tus indications and further detail is provided in the
subsections which follow.
RY/BY# - Ready/Busy#
RY/BY# is an open-drain output pin that indicates
whether a programming or erase Automatic Algo-
rithm is in progress or has completed. A pull-up
resistor to V_CC is required for proper operation. RY/
BY# is valid after the rising edge of the final WE#
pulse in the corresponding command sequence,
including during the sector erase time-out.
If the output is Low (busy), the device is actively
erasing or programming, including programming
while in the Erase Suspend mode. If the output is
High (ready), the device has completed the op-
eration and is ready to read array data, is in the
standby mode, or at least one bank is in the erase-
suspend read mode.
HY29DS162/HY29DS163
DQ[7] - Data# Polling
The Data# Polling bit, DQ[7], indicates to the host
system whether an Automatic Algorithm is in
progress or completed, or whether a bank is in
Erase Suspend mode. Data# Polling is valid after
the rising edge of the final WE# pulse in the pro-
gram or erase command sequence.
While a programming operation is in progress, the
device outputs the complement of the value pro-
grammed to DQ[7]. When the programming op-
eration is complete, the device outputs the value
programmed to DQ[7]. If a program operation is
attempted within a protected sector, Data# Poll-
ing on DQ[7] is active for approximately 1 µs, then
the device returns to reading array data. The host
system must do a read at the program address to
obtain valid programming status information on this
bit.
During an erase operation, Data# Polling produces
a “0” on DQ[7]. When the erase operation is com-
plete, or if the bank enters the Erase Suspend
mode, Data# Polling produces a “1” on DQ[7]. The
host must read at an address within any of the
non-protected sectors designated for erasure to
Table 16. Write and Erase Operation Status Summary
Mode
Operation
DQ[7] ¹ DQ[6] DQ[5] DQ[3] DQ[2] ¹ RY/BY#
Programming in progress
DQ[7]# Toggle
0/1 ²
N/A
N/A
0
Programming completed
Normal
Erase in progress
Data
Data ⁴
Data
Data
Data
1
0
Toggle
0/1 ²
1³
Toggle
0
Erase completed ⁵
Data
Data ⁴
Data
Data
Data ⁴
1
Read within erase suspended
sector
1
No toggle
0
N/A
Toggle
1
Erase ^{Read within non-erase}
Suspend ^{suspended sector}
Data
Data
Data
Data
Data
1
Programming in progress ⁶
DQ[7]# Toggle
0/1 ²
N/A
N/A
0
Programming completed ⁶
Data
Data ⁴
Data
Data
Data
1
Notes:
1. A valid address within the bank where an Automatic algorithm is in progress is required when reading status information
except RY/BY#. For a programming operation, the address used for the read cycle should be the program address. For
an erase operation, the address used for the read cycle should be any address within a non-protected sector marked for
erasure (any address for the chip erase operation).
2. DQ[5] status switches to a ‘1’ when a program or erase operation exceeds the maximum timing limit.
3. A ‘1’ during sector erase indicates that the 50 µs time-out has expired and active erasure is in progress. DQ[3] is not
applicable to the chip erase operation.
4. Equivalent to ‘No Toggle’ because data is obtained in this state. For ‘Erase Completed’,
5. Data (DQ[7:0]) = 0xFF immediately after erasure.
6. Programming can be done only in a non-suspended sector (a sector not specified for erasure).
r1.3/Apr 01
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