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HY29DS162 Datasheet, PDF (1/48 Pages) Hynix Semiconductor – 16 Megabit (2M x 8/1M x 16) Super-Low Voltage, Dual Bank, Simultaneous Read/Write, Flash Memory | |||
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HY29DS162/HY29DS163
16 Megabit (2M x 8/1M x 16) Super-Low Voltage,
Dual Bank, Simultaneous Read/Write, Flash Memory
KEY FEATURES
n Single Power Supply Operation
â Read, program, and erase operations
from 1.8 to 2.2 V (2.0V ± 10%)
â Ideal for battery-powered applications
n Simultaneous Read/Write Operations
â Host system can program or erase in one
bank while simultaneously reading from any
sector in the other bank with zero latency
between read and write operations
n High Performance
â 120 and 130 ns access time versions with
± 10% power supply and 30pF load
n Ultra Low Power Consumption (Typical
Values)
â Automatic sleep mode current: 200 nA
â Standby mode current: 200 nA
â Read current: 5 mA (at 5 MHz)
â Program/erase current: 15 mA
n Boot-Block Sector Architecture with 39
Sectors in Two Banks for Fast In-System
Code Changes
n Secured Sector: An Extra 64 Kbyte Sector
that Can Be:
â Factory locked and identifiable: 16 bytes
available for a secure, random factory-
programmed Electronic Serial Number
â Customer lockable: Can be read, program-
med, or erased just like other sectors
n Flexible Sector Architecture
â Sector Protection allows locking of a
sector or sectors to prevent program or
erase operations within that sector
â Temporary Sector Unprotect allows
changes in locked sectors (requires high
voltage on RESET# pin)
n Automatic Erase Algorithm Erases Any
Combination of Sectors or the Entire Chip
n Automatic Program Algorithm Writes and
Verifies Data at Specified Addresses
n Compliant with Common Flash Memory
Interface (CFI) Specification
n Minimum 100,000 Write Cycles per Sector
(1,000,000 cycles Typical)
n Compatible with JEDEC Standards
â Pinout and software compatible with
single-power supply Flash devices
â Superior inadvertent write protection
n Data# Polling and Toggle Bits
â Provide software confirmation of completion
of program or erase operations
n Ready/Busy# Pin
â Provides hardware confirmation of
completion of program or erase operations
n Erase Suspend
â Suspends an erase operation to allow
programming data to or reading data from
a sector in the same bank
â Erase Resume can then be invoked to
complete the suspended erasure
n Hardware Reset Pin (RESET#) Resets the
Device to Reading Array Data
n WP#/ACC Input Pin
â Write protect (WP#) function allows
hardware protection of two outermost boot
sectors, regardless of sector protect status
â Acceleration (ACC) function provides
accelerated program times
n Fast Program and Erase Times
â Sector erase time: 1 sec typical
â Byte/Word program time utilizing
Acceleration function: 13 µs typical
n Space Efficient Packaging
â 48-pin TSOP and 48-ball FBGA packages
LOGIC DIAGRAM
20
A[19:0]
8
DQ[7:0]
7
CE#
DQ[14:8]
OE#
WE#
DQ[15]/A[-1]
WP#/ACC
RESET#
RY/BY#
BYTE#
Preliminary
Revision 1.3, April 2001
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