HY29DS162 Datasheet, PDF (10/48 Pages) Hynix Semiconductor – 16 Megabit (2M x 8/1M x 16) Super-Low Voltage, Dual Bank, Simultaneous Read/Write, Flash Memory

HY29DS162/HY29DS163
Table 5. HY29DS16x Normal Bus Operations ¹
Operation
DQ[15:8] ³
CE# OE# WE# RESET# WP#/ACC Address ² DQ[7:0]
BYTE# = H BYTE# = L
Read
L
LH
H
L/H
A_IN
D_OUT
D_OUT
High-Z
Write
L
HL
H
Note 4
A_IN
D_IN
D_IN
High-Z
Output Disable
L
HH
H
L/H
X
High-Z High-Z High-Z
CE# Normal
Standby
H
XX
H
H
X
High-Z High-Z High-Z
CE# Deep Standby V_CC ± 0.3V X X V_CC ± 0.3V
H
Hardware Reset
(Normal Standby)
X
XX
L
L/H
X
High-Z High-Z High-Z
X
High-Z High-Z High-Z
Hardware Reset
(Deep Standby)
X
X X V_SS ± 0.3V L/H
X
High-Z High-Z High-Z
Notes:
1. L = V , H = V , X = Don’t Care (L or H), D = Data Out, D = Data In. See DC Characteristics for voltage levels.
IL
IH
OUT
IN
2. Address is A[19:0, -1] in Byte Mode and A[19:0] in Word Mode.
3. DQ[15] is the A[-1] input in Byte Mode (BYTE# = L).
4. If WP#/ACC = V_IL, the two outermost boot sectors remain protected. If WP#/ACC = V_IH, the protection state of the two
outermost boot sectors depends on whether they were last protected or unprotected using the method described in
“Sector/Sector Block Protection and Unprotection”. If WP#/ACC = V_HH, all sectors will be unprotected.
Table 6. HY29DS16x Bus Operations Requiring High Voltage ^{1, 2}
Operation ³
DQ[15:8]
CE# OE# WE# RESET# A[19:12] A[9] A[6] A[1] A[0] DQ[7:0] _{BYTE# BYTE#}
= H = L⁵
Sector Group Protect L H L
V_ID
SGA ⁴ X
L
HL
D_IN
X
X
Sector Unprotect
LHL
V_ID
X
X HHL
D_IN
X
X
Temporary Sector
Unprotect ^{6, 7}
-- -- --
V_ID
--
-- -- -- --
--
--
--
Manufacturer Code
L LH
H
HY29DS162B
X
V_ID
L
L
L
0xAD
X High-Z
0x6D
Device ^HY29DS162T
Code HY29DS163B
L
L
H
H
0x69
X
V_ID
L
L
H
0x22 High-Z
0x6E
HY29DS163T
0x6A
Sector _Unprotected
0x00
Protect
L LH
H
SA ⁴ V_ID L
H
L
X High-Z
State ^Protected
0x01
Secure Factory
Sector Locked
Indicator Not Factory
L
L
H
H
Bit
Locked
0x80
X
V_ID
L
H
H
0x00
X High-Z
Notes:
1. L = V_IL, H = V_IH, X = Don’t Care (L OR H), V_ID = 10V nominal. See DC Characteristics for voltage levels.
2. Address bits not specified are Don’t Care.
3. See text and Appendix for additional information.
4. SA = Sector Address, SGA = Sector Group Address. See Tables 1, 2, 7, and 8.
5. DQ[15] is the A[-1] input in Byte Mode (BYTE# = L).
6. Normal read, write and output disable operations are used in this mode. See Table 5.
7. If WP#/ACC = V_IL, the two outermost boot sectors remain protected.
10
r1.3/Apr 01