GM82C765B Datasheet, PDF (30/36 Pages) Hynix Semiconductor – FLOPPY DISK SUBSYSTEM CONTROLLER

GM82C765B
data beyond DTL in the sector is not sent to the
Data Bus. The FDC reads (internally) the
complete sector performing the CRC check, and
depending upon the manner of command
termination, may perform a Multi-Sector Read
operation. When N is non-zero, then DTL has no
meaning and should be set to FF Hexadecimal.
TABLE 27. TRANSFER CAPACITY
Multi-
track
MT
MFM/FM
MF
Bytes/
Sector
N
Maximum Transfer
Capacity
(Number of Sectors)
0
0
00 (128) (26) – 3.328
0
1
01 (256) (26) – 6.656
1
0
00 (128) (52) – 6.658
1
1
01 (256) (52) –13.312
0
0
01 (256) (15) – 3.840
0
1
02 (512) (15) – 7.680
1
0
01 (256) (30) – 7.680
1
1
02 (512) (30) – 15,360
0
0
02 (512) (8) – 4.096
0
1
03 (1024) (8) – 8.192
1
0
02 (512) (16) – 8.192
1
1
03 (1024) (16) – 16.384
Final Sector
Read from
Diskettes
26 at Side 0
or 26 at Side 1
26 at Side1
15 at Side 0
or 15 at Side 1
15 at Side 1
8 at Side 0
or 8 at Side 1
8 at Side 1
At the completion of the Real data Command,
the head is not unloaded until after head unload
time interval (specified in the specify Command)
has elapsed. If the processor issues another
command before the head unloads, then the head
setting time may be saved between subsequent
reads. This time out is particularly valuable when
a diskette is copied from one drive to another.
If the FDC detects the index Hole twice
without finding the right sector, (indicated in ‘R’),
then the FDC sets the ND (No Data) flag in status
Register 1to a 1 (high), and terminates the Read
Data command (Status Register 0 also has bits 7
and 6 set to 0 and 1 respectively.)
After reading the ID and Data Fields in each
sector, the FDC checks the CRC bytes If a read
error is detected (incorrect CRC in ID field), the
FDC sets the DE(Data Error) flag in Status
Register 1 to 1 (High) If a CRC error occurs in
the data field, the FDC also sets the DD(Data
Error in Data Field) flag in Status Register 2 to
1(High) and terminates the Read data command.
(Status Register 0 also has bits 7 and 6 set to 0
and 1 respectively.)
If the FDC reads a Deleted Data Address Mark
off the diskette, and the SK bit (bit D5 in the first
Command Word) is not set (SK =0), then the
FDC sets the CM(control Mark) flag in Status
Register 2 to a 1 (high), and terminates the Read
Data command, after reading all the data in the
sector. If SK = 1, the FDC skips the sector with
the Deleted Data Address Mark and reads the
next sector. The CRC bits in the deleted data field
are not checked when SK = 1.
During disk Data transfers between the FDC and
the processor, via the data bus, the FDC must be
serviced by the processor every 27 us in the FM
mode, land every 13 us in the MFM mode, or the
FDC sets the OR (Overrun) flag in status Register.
1 to a 1 (high), and terminates the Read Data
command.
TABLE 28. C, H, R, and VALUES
MT HD
Final Sector
Transferred
to processor
0 Less then EOT
0 Equal to EOT
0
1 Less then EOT
1 Equal to EOT
0 Less then EOT
0 Equal to EOT
1
1 Less then EOT
1 Equal to EOT
ID information at Resul t Phase
C
H
R
N
NC NC R+1 NC
C+ 1 NC R=01 NC
NC NC R+1 NC
C+1 NC R=01 NC
NC NC R+1 NC
NC LSB R=01 NC
NC NC R+1 NC
C+1 LSB R=01 NC
Notes : NC (No Change) : The same value the one at the beginning
of command execution. LSB (Least Significant Bit): The
Least significant bit of H is complemented.
30