GM82C765B Datasheet, PDF (11/36 Pages) Hynix Semiconductor – FLOPPY DISK SUBSYSTEM CONTROLLER

3. ARCHITECTURE
The GM82C765B Floppy Disk Subsystem
Controller is a CMOS LSI device that provides
all the needed functionality between the host
u-processor peripheral Bus and the cable
Connec-tor to the Floppy Disk Drive. This CHIP
in-tegrates; Formatter/Controller Data Separation,
Write Precompensation, Data rate Seletion,
Clock generation, Drive interface drivers and
receivers.
GM82C765B
HOST INTERFACE
The host interface is the host microprocessor
peripheral bus. This bus is composed of eight
control signals and eight data signals. In the
special or PC AT modes, IRQ and DMA request
are tri-stated and qualified enable, internally
provided by the operations register. The data bus,
DMA, and IRQ outputs are designed to handle 20
LS-TTL loading.
8 Bit
DATA
BUS
CONTROL
REGISTER
MASTER
STATUS REG
DATA
REGISTER
OPERATION
REGISTER
DRV
RD
WR
CS
A0
DACK
TC
DMA
IRQ
LDCR
LDOR
HOST
INTERFACE
CLK1
CLK2
CRYSTAL
OSc×2
8 Bit INTERNAL DATA BUS
CLOCK
MCLK
AND
01
ALU
TIMING
GENERATOR ⁰²
WCLK
SCLK
MS
TIMER
SATE
MACHINE
RAM
24 × 8
INSTRUCTION
DECODE
PROGRAM
COUNTER
FLAG
LOGIC
ROM
1KÏ16
DISK
INTERFACE
CONTROL
REGISTER
HS
HDL
STEP
DIRC
RWC
DS1 − 4
TROO
IDX
WP
DCHG *
DIGITAL DATA
SEPARATOR
DATA ENCODER
DECODER
CRC GENERATOR
WRITE
PRECOMPENSATION
RDD
WE
WD
PCVAL
PLCC version of GM82C765B only
Fig 1. GM82C765B Internal Block Diagram
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