GM82C765B Datasheet, PDF (15/36 Pages) Hynix Semiconductor – FLOPPY DISK SUBSYSTEM CONTROLLER

GM82C765B
TABLE 3. STATUS REGISTER 0 BITs
BIT
NO
NAME
SYMBOL
DESCRIPTION
D7 INTERRUPT
IC D7 = 0 and D6 = 0, Normal termination of command was completed
CODE
properly executed.
D7 = 0 and D6 = 1, Abnormal termination of command (AT).
Execution of command was started but was not successfully completed.
D6
D7 = 1 and D6 = 0.
Invalid comand issue, (IC). Command which was issued was never
started.
D5 SEEK END
SE When FDC completes the SEEK comand, this flag is set to 1 (HIGH)
#D4 EQUIPMENT
EC If the Track 0, signal fails to occur after 255 step pulses (Recalibrate
CHECK
command). Then this flag is set.
#D3 NOT READY
NR Since drive ready is always persumed true. This will always be a LOGIC
0.
D2 HEAD SELECT HS This flag is used to indicate the state of HEAD at interrupt
D1 UNIT SELECT 1 US1 This flag is used to indicate a DRIVE UNIT Number at interrupt
D0 UNIT SELECT 0 US0 This flag is used to indicate a DRIVE UNIT Number at interrupt
TABLE 4. STATUS REGISTER 1 BITs
BIT
NO
NAME
D7 END OF
CYCLINDER
D6
D5 DATA ERROR
D4 OVERRUN
D3 NOT DATA
D2 NO DATA
D1 NOT
WRITEABLE
SYMBOL
DESCRIPTION
EN When the FDC tries to access a sector beyond the final sector of a
cylinder,this flag is set.
Not used. This bit is always 0 (low)
DE When the FDC detects a * CRC error in either the ID field or a cylinder,
this flag is set.
OR If the FDC is not serviced by the host system during data transfers within
a certain time interval, this flag is set.
Not used. This bit is always 0 (low)
ND During execution of READ DATA, WRITE DELETED DATA, or SCAN
command, if the FDC cannot find the sector specified in the * * IDR
Register, this flag is set. During execution of the READ ID command, if
the FDC cannot read the ID field without an error, then this flag is set.
During execution of the READ A TRACK command, if the starting sector
cannot be found, then this flag is set.
NW During execution of WRITE DATA, WRITE DELETED DATA or
RORMAT A TRACK commands. If the FDC detects a WP signal from
the FDC, then this flag is set.
15