HMT112U7BFR8C-G7 Datasheet, PDF (28/51 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM Registered DIMM

Reference Load for AC Timing and Output Slew Rate
Figure below represents the effective reference load of 25 ohms used in defining the relevant AC timing
parameters of the device as well as output slew rate measurements.
It is not intended as a precise representation of any particular system environment or a depiction of the
actual load presented by a production tester. System designers should use IBIS or other simulation tools to
correlate the timing reference load to a system environment. Manufacturers correlate to their production
test conditions, generally one or more coaxial transmission lines terminated at the tester electronics.
VDDQ
CK, CK
DUT
25 Ohm
DQ
VTT = VDDQ/2
DQS
DQS
Reference Load for AC Timing and Output Slew Rate
Rev. 0.1 / Nov. 2009
28