HMT112U7BFR8C-G7 Datasheet, PDF (25/51 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM Registered DIMM

AC & DC Output Measurement Levels
Single Ended AC and DC Output Levels
Table below shows the output levels used for measurements of single ended signals.
Single-ended AC and DC Output Levels
Symbol
Parameter
DDR3L-800, 1066,
1333
Unit
Notes
V_OH(DC)
DC output high measurement level (for IV curve linearity)
0.8 x V_DDQ
V
V_OM(DC)
DC output mid measurement level (for IV curve linearity)
0.5 x V_DDQ
V
V_OL(DC)
DC output low measurement level (for IV curve linearity)
0.2 x V_DDQ
V
V_OH(AC)
AC output high measurement level (for output SR)
V_TT + 0.1 x V_DDQ
V
1
V_OL(AC)
AC output low measurement level (for output SR)
V_TT - 0.1 x V_DDQ
V
1
Notes:
1. The swing of ± 0.1 x V_DDQ is based on approximately 50% of the static single ended output high or low
swing with a driver impedance of 40Ω and an effective test load of 25Ω to V_TT = V_DDQ / 2.
Differential AC and DC Output Levels
Table below shows the output levels used for measurements of single ended signals.
Differential AC and DC Output Levels
Symbol
Parameter
DDR3L-800, 1066,
1333
Unit
Notes
V_{OHdiff (AC) AC differential output high measurement level (for output SR)}
V_{OLdiff (AC) AC differential output low measurement level (for output SR)}
+ 0.2 x V_DDQ
- 0.2 x V_DDQ
V
1
V
1
Notes:
1. The swing of ± 0.2 x V_DDQ is based on approximately 50% of the static differential output high or low
swing with a driver impedance of 40Ω and an effective test load of 25Ω to V_TT = V_DDQ/2 at each of the
differential outputs.
Rev. 0.1 / Nov. 2009
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