HD66727 Datasheet, PDF (91/97 Pages) Hitachi Semiconductor – Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function

HD66727
Electrical Characteristics Notes
1. All voltage values are referred to GND = 0V. If the LSI is used above the absolute maximum ratings, it
may become permanently damaged. Using the LSI within the given electrical characteristic is strongly
recommended to ensure normal operation. If these electrical characteristic are exceeded, the LSI may
malfunction or exhibit poor reliability.
2. V_CC > V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5 > V_EE must be maintained.
3. For bare die products, specified at 75°C.
4. For bare die products, specified by the common die shipment specification.
5. The following four circuits are I/O pin configurations except for liquid crystal display output (Figure
51).
Pins: SCL, ID1/CS*, ID0,
OSC1, OPOFF, IM,
EXM, TEST
V_CC
PMOS
NMOS
Pins: KIN3 to KIN0, RESET*
Pins: KST7 to KST0, IRQ*
LED2 to LED0, PORT2 to PORT0
V_CC
V_CC
PMOS
PMOS
V_CC
PMOS
(Pull-up MOS)
NMOS
NMOS
GND
V_CC
Pin: SDA
(Pull-up MOS)
PMOS
GND
V_CC
GND
PMOS
(Input circuit)
NMOS
V_CC (Tri-state output circuit)
PMOS
Output enable
Output data
NMOS
GND
IM
Figure 51 I/O Pin Configurations
6. The TEST pin must be grounded and the ID1 and ID0, IM, EXM, and OPOFF pins must be grounded or
connected to V_CC.
7. Corresponds to the high output for clock-synchronized serial interface.
91