HD66727 Datasheet, PDF (38/97 Pages) Hitachi Semiconductor – Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function

HD66727
Table 19 Annunciator/LED/SEG/COM Shift Direction/SEGRAM Address Set
Address
A A A A DB7 DB6
Annunciator
address
0 0 0 0 ASEG1
0 0 0 1 ASEG5
0 0 1 0 ASEG9
LED port address 0 0 1 1 *
*
SEG/COM shift 0 1 0 0 *
*
direction address
SEGRAM
address
1000*
*
1001*
*
1010*
*
1011*
*
1100*
*
1101*
*
1110*
*
1111*
*
DB5 DB4 DB3 DB2
ASEG2
ASEG3
ASEG6
ASEG7
ASEG10
ASEG11
PORT2 PORT1 PORT0 LED2
*
*
*
*
DB1 DB0
ASEG4
ASEG8
ASEG12
LED1 LED0
CMS SGS
SEGRAM data in COMS1 side
SEGRAM data in COMS2 side
CGRAM Address Set
The CGRAM address set instruction (Figure 19) includes the A (ACG) bits.
AAAAA: Used for setting the CGRAM address into the address counter (AC). The CGRAM addresses
range from 00H to 1FH (32 addresses) (Table 19).
Once the CGRAM address is set, data in the CGRAM can be accessed consecutively since the address
counter is automatically incremented or decremented according to the I/D bit setting after each access. The
CGRAM address cannot be set during the sleep or standby mode.
RS R/W DB7
DB0
0 0 1 0 1 AAAAA
Figure 19 CGRAM Address Set Instruction
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