HD66727 Datasheet, PDF (34/97 Pages) Hitachi Semiconductor – Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function

HD66727
During the standby mode, the other RAM data and instructions may be lost; they must be set again after the
standby mode is canceled.
RS R/W DB7
DB0
0 0 0 0 0 1 1 AMP SLP STB
Figure 13 Power Control Instruction
Display Control
The display control instruction (Figure 14) includes the NL and DL bits.
NL1, NL0: Designates the number of display lines. This value determines the LCD drive multiplexing duty
ratio (Table 15). The address assignment is the same for all display line modes.
DL3–DL1: Doubles the height of characters on a specified line. The first, second, or third line is doubled in
height when DL1, DL2, or DL3 = 1, respectively. Two lines can be simultaneously doubled in a 4-line
display. Refer to the Double-Height Display section.
RS R/W DB7
DB0
0 0 0 0 1 NL1 NL0 DL3 DL2 DL1
Figure 14 Display Control Instruction
Table 15 NL Bits and Display Lines
NL1 NL0 Number of Display Lines
0
0
1
0
1
2
1
0
3
1
1
4
LCD Drive Multiplexing Duty Ratio
1/10
1/18
1/26
1/34
Contrast Control
The contrast control instruction (Figure 15) includes the SN and CT bits.
SN2: Combined with the SN1 and SN0 bits described in the Scroll Control section to select the top line to
be scrolled (display-start line).
CT3–CT0: Controls the LCD drive voltage (potential difference between V_CC and V5) to adjust contrast
(Figure 16 and Table 16). For details, refer to the Contrast Adjuster section.
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