HD66727 Datasheet, PDF (46/97 Pages) Hitachi Semiconductor – Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function

HD66727
Serial Data Transfer
I²C Bus Interface
Grounding the IM pin (interface mode pin) allows serial data transfer conforming to the I²C bus interface
using the serial data line (SDA) and serial transfer clock line (SCL). Here, the HD66727 operates in an
transmit/receive slave mode.
The HD66727 initiates serial data transfer by transferring the first byte when a high SCL level at the falling
edge of the SDA input is sampled; it ends serial data transfer when a high SCL level at the rising edge of
the SDA input is sampled.
Table 24 illustrates the first bytes of I²C bus interface data and Figure 23 shows the I²C bus interface timing
sequence.
The HD66727 is selected when the higher six bits of the 7-bit slave address in the first byte transferred
from the master device match the 6-bit device identification code assigned to the HD66727. The HD66727,
when selected, receives the subsequent data string. The lower bits of the identification code can be
determined by the ID1 and ID0 pins; select an appropriate code that is not assigned to any other slave
device. The upper four bits is fixed to 0111. Two different slave addresses must be assigned to a single
HD66727 because the least significant bit (LSB) of the slave address is used as a register select bit (RS):
when RS = 0, an instruction can be issued or key scan data can be read, and when RS = 1, data can be
written to or read from RAM. Read or write is selected according to the eighth bit of the first byte (R/W
bit) as shown in Table 25.
The ninth bit of the first byte is a receive-data acknowledge bit (ACK). When the received slave address
matches the device ID code, the HD66727 pulls down the ACK bit to a low level. Therefore, the ACK
output buffer is an open-drain structure, only allowing low-level output. However, the ACK bit is
undetermined immediately after power-on; make sure to initialize the LSI using the RESET* input.
After identifying the address in the first byte, the HD66727 receives the subsequent data as an HD66727
instruction or as RAM data, or transmits key scan data or RAM data. Having received or transmitted 8-bit
data normally, the HD66727 pulls down the ninth bit (ACK) to a low level. Therefore, if the ACK is not
returned, the data must be transferred again. Multiple bytes of data can be consecutively transferred until
the transfer-end condition is satisfied. Here, when the serial data transfer rate is longer than the HD66727
instruction execution time, effective data transfer is possible without retransmission (see Table 23,
Instruction List). Note that the display clear instruction alone requires longer execution time than the
others.
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