HD66520 Datasheet, PDF (43/45 Pages) Hitachi Semiconductor – 160-Channel 4-Level Grayscale Display Column Driver with Internal Bit-Map RAM

HD66520T
AC Characteristics 3 (V_CC = 4.5 to 5.5V, GND = 0V, V_CC–V_EE = 8 to 28V, Ta = –20 to +75°C)
• Access Timing
 Read Cycle
Regulation terms:
Input level:
VIH = 2.4V, VIL = 0.8V
Output judge-level:
VOH/VOL = 1.5V
Output load:
1 TTL gate + capa. 100 pF
No. Item
Symbol Min
(8)
Read cycle time
t_RC
180
(9)
Address access time
t_AA
—
(10) Chip select access time
t_CA
—
(11) &6 high level width
t_CHR
120
(12) &6 low level width
t_CLR
180
(13) 2( delay time
t_OE
—
(14)
2( delay time (low impedance)
t_OLZ
5
(15) Output-disable delay time
t_OHZ
0
(16) Output hold time
t_OH
5
Max
Unit
—
ns
180
ns
180
ns
—
ns
t_FS–1000
ns
100
ns
—
ns
35
ns
—
ns
Note
 Write Cycle
Regulation terms:
Input level:
VIH = 2.4V, VIL = 0.8V
No. Item
Symbol Min
(17) Write cycle time
(18) Address-to-:( setup time
(19) &6 high level width
(20) &6 low level width
(21) Address-to-:( hold time
(22) &6-to-:( hold time
(23) :( low level width
(24) :( high level width
(25) Data-to-:( setup time
(26) Data-to-:( hold time
t_WC
t_ASW
t_CHW
t_CLW
t_AHW
t_CH
t_WLW
t_WHW
t_DS
t_DH
120
20
120
120
0
0
80
30
60
20
Max
—
—
—
t_FS–1000
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1056