HD66520 Datasheet, PDF (34/45 Pages) Hitachi Semiconductor – 160-Channel 4-Level Grayscale Display Column Driver with Internal Bit-Map RAM

HD66520T
Restraints
The HD66520 can perform continuous draw access (burst access) when signal &6 is low. As a result,
display data can be rewritten at high speed.
However, since signal &6 is necessary to perform arbitration control between draw access and display
access to the display memory, the following restraints exist for the pulse width of signal &6.
V_CC = 3.0 to 4.5V
• Read operation
Item
Symbol
Min
Chip select high level width t_CHR
180
Chip select low level width
t_CLR
240
Max
—
t_FS – 1000
Unit
ns
ns
• Write operation
Item
Symbol
Min
Chip select high level width t_CHW
180
Chip select low level width
t_CLW
180
Max
—
t_FS – 1000
Unit
ns
ns
V_CC = 4.5 to 5.5V
• Read operation
Item
Symbol
Min
Chip select high level width t_CHR
120
Chip select low level width
t_CLR
180
• Write operation
Item
Symbol
Min
Chip select high level width t_CHW
120
Chip select low level width
t_CLW
120
Max
—
t_FS – 1000
Unit
ns
ns
Max
—
t_FS – 1000
Unit
ns
ns
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