HD66520 Datasheet, PDF (13/45 Pages) Hitachi Semiconductor – 160-Channel 4-Level Grayscale Display Column Driver with Internal Bit-Map RAM

HD66520T
Address Management
The HD66520 has an address management function that corresponds to three display sizes all of which
are standard sizes for portable information devices: a 160-dot-wide by 240-dot-long display (small
information devices); a 320-dot-wide by 240-dot-long display (quarter VGA size); and a 320-dot-wide by
480-dot-long display (half VGA size). Up to four HD66520s can be connected to at a time to configure
easily liquid crystal displays with the resolutions mentioned above.
Driver Layout and Address Management
The Y lines on a liquid crystal panel and memory data in a driver are inverted horizontally depending on
the connection side of the liquid crystal panel and the driver. When several drivers are connected, address
management is needed for each driver. Although reinverted bit-map plotting or address management by
the &6 pin in each driver are possible by using special write addressing, the load on the software is
significantly increased. To avoid this, the HD66520 provides memory addresses independent of
connection side, but responds to the setting of pins LS0, LS1, and SHL.
How to Use the LS1 and LS0 Pins
Pins LS1 and LS0 set the LSI position (up to four) as shown in Figure 8 by assigning ID numbers 0 to 3
to each HD66520.
LS1 LS0 ID No.
L
L
0
L
H
1
H
L
2
H
H
3
L: Low level
H: High level
Address Arrangement
Upper-left side
Lower-left side
Upper-right side
Lower-right side
ID = 0
ID = 2
HD66520 HD66520
320
480
LCD panel
HD66520 HD66520
ID = 1 ID = 3
Figure 8 LS0 and LS1 Pin Setting and Internal Memory Map
1026