HD61830 Datasheet, PDF (34/43 Pages) Hitachi Semiconductor – LCDC (LCD Timing Controller)

HD61830/HD61830B
HD61830B Electrical Characteristics (V_CC = 5V ±10%, GND = 0V, T_a = –20 to
+75°C)
Item
Symbol Min
Typ Max
Unit Test Condition Notes
Input high voltage (TTL)
VIH
2.2
—
V_CC
V
1
Input low voltage (TTL)
VIL
0
— 0.8
V
2
Input high voltage
VIHR 3.0
—
V_CC
V
3
Input high voltage (CMOS)
VIHC
0.7 V_CC —
V_CC
V
4
Input low voltage (CMOS)
VILC
0
—
0.3 V_CC V
4
Output high voltage (TTL)
VOH
2.4
—
V_CC
V
–I_OH = 0.6 mA 5
Output low voltage (TTL)
VOL
0
— 0.4
V
I_OL = 1.6 mA
5
Output high voltage (CMOS)
VOHC V_CC – 0.4 —
V_CC
V
–I_OH = 0.6 mA 6
Output low voltage (CMOS)
VOLC 0
— 0.4
V
I_OI = 0.6 mA
6
Input leakage current
I _IN
–5
—5
µA VIN = 0 – V_CC 7
Three-state leakage current
I _TSL
–10
— 10
µA VOUT = 0 – V_CC 8
Pull-up current
I _PL
2
10 20
µA Vin = GND
9
Power dissipation
P_W
—
— 50
mW External clock 10
f_cp = 2.4 MHz
Notes: 1. Applied to input terminals and I/O common terminals, except terminals SYNC, CR, and RES.
2. Applied to input terminals and I/O common terminals, except terminals SYNC and CR.
3. Applied to terminal RES.
4. Applied to terminals SYNC and CR.
5. Applied to terminals DB0–DB7, WE, MA0–MA15, OE, CE, and MD0–MD7.
6. Applied to terminals SYNC, FLM, CL1, CL2, D1, D2, MA, and MB.
7. Applied to input terminals.
8. Applied to I/O common terminals. However, the current which flows into the output drive MOS is
excluded.
9. Applied to SYNC, DB0–DB7, and RD0–RD7.
10. The current which flows into the input and output circuits is excluded. When the input of CMOS is
in the intermediate level, current flows through the input circuit, resulting in the increase of power
supply current. To avoid this, input must be fixed at high or low.
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