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HD61830 Datasheet, PDF (30/43 Pages) Hitachi Semiconductor – LCDC (LCD Timing Controller)
HD61830/HD61830B
Timing Characteristics
HD61830 MPU Interface (VCC = 5 V ±10%, GND = 0 V, Ta = –20 to +75°C)
Item
Symbol Min
Typ
Enable cycle time
t CYC
1.0
—
Enable pulse width High level
t WEH
0.45
—
Low level
t WEL
0.45
—
Enable rise time
t Er
—
—
Enable fall time
t Ef
—
—
Setup time
t AS
140
—
Data setup time
t DSW
225
—
Data delay time
t DDR
—
—
Data hold time
t DHW
10
—
Address hold time
t AH
10
—
Output data hold time
t DH
20
—
Note: * The following load circuit is connected for specification:
tCYC
tWEH
tWEL
2.2 V
E
0.8 V
tEr
tEf
tAS
tAH
CS, R/W, RS
2.2 V
0.8 V
tDSW tDHW
Max
—
—
—
25
25
—
—
225
—
—
—
DB0–DB7
(MPU→HD61830)
DB0–DB7
(MPU←HD61830)
VCC
2.2 V
0.8 V
tDDR
tDH
2.4 V
0.4 V
Test point
R
D1 RL
D2
C D3
D4
RL = 2.4 kΩ
R = 11 kΩ
C = 130 pF (C includes jig capacitance)
Diodes D1 to D4 : 1S2074 H
Unit
µs
µs
µs
ns
ns
ns
ns
ns *
ns
ns
ns
30